Serial interface device
US6215817A · kind A · utility
14Cited by
3References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 2, 1998 |
| Grant date | Apr 10, 2001 |
| Priority date | — |
| Expiry date | Feb 2, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/04
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A serial interface circuit is compatible with a three-wire interface, but uses only one or two wires. One wire is a data signal line. The other wire, if present, is a scan signal line or clock signal line. If only one wire is used, the serial interface circuit detects the start of a communication period by detecting a synchronization pattern, and generates a clock signal, approximately synchronized to the clock signal used at the partner interface circuit, by dividing a higher-frequency clock signal. The partner interface circuit can operate as if a three-wire interface were being used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.