Carrier control loop for a receiver of digitally transmitted signals
US6215830A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 1998 |
| Grant date | Apr 10, 2001 |
| Priority date | — |
| Expiry date | Jul 13, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0067
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A carrier control loop (1) for a receiver of digitally transmitted signals is disclosed comprising, in the direction of signal flow, a quadrature demodulator (3), a symbol recognition device (4), a detector (9) for forming a phase deviation value (.phi.d) and/or a frequency deviation value (fd), a feedback device (10), and a variable-frequency oscillator (11) connected to the quadrature demodulator (3). An evaluating device (12) determines from signals (I, Q) of the carrier control loop (1) a reliability value (z) for the measured phase deviation value (.phi.d) and/or frequency deviation value (fd), and controls the carrier control loop (1) in accordance with the determined reliability value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.