One-shot pulse synchronizer
US6218874A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 1999 |
| Grant date | Apr 17, 2001 |
| Priority date | — |
| Expiry date | Jun 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus comprising a memory section and a first circuit. The memory section may be configured to present a first output in response to (i) a first clock signal, (ii) a second clock signal, (iii) an input pulse and (iv) the first output. The first circuit may be configured to generate a second output in response to (i) the first output and (ii) the second clock signal, where the second output may comprise a pulse having a width equal to a period of the second clock signal. In one example, an input circuit may be configured to present the first output to the memory section in response to the input pulse and a first feedback of the output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.