Multiple well transistor circuits having forward body bias
US6218895A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 1998 |
| Grant date | Apr 17, 2001 |
| Priority date | — |
| Expiry date | May 13, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/378
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment to the invention, a semiconductor circuit includes a substrate and a first well formed in the substrate. A first group of field effect transistors is formed in the first well and has a first body. The circuit includes a first body voltage to the first body to forward body bias the first group of field effect transistors. The circuit includes a first isolation structure to contain the first body voltage in the first well. In another embodiment, the circuit further includes a second group of field effect transistors having a non-forward body bias and the first isolation structure prevents the first body voltage from influencing a voltage of a body of the second group of field effect transistors. In yet another embodiment, a second isolation structure adjacent to the second well contain a second body voltage in a second well holding the second group of field effect transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.