Transmission line loop
US6219733A · kind A · utility
4Cited by
7References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 26, 1998 |
| Grant date | Apr 17, 2001 |
| Priority date | — |
| Expiry date | Aug 26, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/148
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Two daughter cards connected by bus connectors to a motherboard have integrated circuits connected to each other and to an integrated circuit on the motherboard through a bus network. The bus network is also connected by a bus cable connected at the top of the two daughter cards so as to form a loop within the bus network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.