Fabrication method of semiconductor device with HSG configuration
US6221730A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 2, 1999 |
| Grant date | Apr 24, 2001 |
| Priority date | — |
| Expiry date | Feb 2, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/321
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fabrication method of a semiconductor device is provided, which makes it possible to introduce suitably a dopant into surface grains of a semiconductor layer at a comparatively low temperature. In the first step, a first semiconductor layer is formed over a semiconductor substrate through a first dielectric. In the second step, the first semiconductor layer is heat-treated to form semiconductor grains on a surface of the first semiconductor layer, thereby roughening the surface of the first semiconductor layer. The grains are made of a same material as that of the first semiconductor layer. In the third step, the first semiconductor layer with the semiconductor grains is heat-treated at a temperature of approximately 700.degree. C. to 780.degree. C. for a specific time in an atmosphere containing a gaseous dopant, thereby introducing the dopant into the semiconductor grains of the first semiconductor layer from the atmosphere. Preferably, a step of forming a second dielectric layer is additionally provided between the second and third steps, where the second dielectric layer is not doped with any dopant. The dopant is introduced into the semiconductor grains of the first semicond…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.