Memory devices having a restore start address counter
US6222793A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 6, 2000 |
| Grant date | Apr 24, 2001 |
| Priority date | — |
| Expiry date | Jun 6, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention may provide methods of controlling a memory device and memory devices including a memory array having an internal address input which specifies a location in the memory array accessed during read operations and write operations. An external address input receives an address value from a device external to the memory device. The received address value may be utilized to randomly access the memory array. An address register/restart address counter is operatively associated with the memory array and the external address input and configured to store a start address for at least a write operation to the memory array, to selectively generate a series of internal addresses to access the memory array based on the stored start address and to selectively return to the stored start address as a start address of a subsequent operation to access the memory array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.