Method and system for performing concurrent read and write cycles in network switch
US6222840A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1996 |
| Grant date | Apr 24, 2001 |
| Priority date | — |
| Expiry date | Dec 30, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/354
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system for performing concurrent read and write cycles in a network switch. The network switch includes several network ports, a data bus and a switch manager to execute a concurrent read and write cycle on the data bus by asserting a first port number to identify a source port followed by a second port number to identify a destination port. Each of the ports includes a network interface for sending and receiving data packets and a data interface to store the first port number, to assert data received from the network interface onto the data bus if that port is identified by the first port number, and to retrieve data from the data bus for transmission by the network interface if that port is identified by the second port number. In this manner, data is transferred directly between a source and a destination port without being buffered in the switch manager. The bandwidth of the data bus is increased since data is transferred only once on the data bus. Latches are provided for the ports to latch the read port number to allow that write port number to be asserted during the cycle. A method of executing a concurrent read and write cycle includes the steps of asserting a first port …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.