Protection scheme for multi-transistor amplifiers
US6225867A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1997 |
| Grant date | May 1, 2001 |
| Priority date | — |
| Expiry date | Dec 23, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/21178
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention deals with the problems related to thermal runaway and over-voltage breakdown in integrated circuits using a series of power transistors interconnected in a parallel circuit arrangement. The general technique described consists of a protection scheme that involves the application of a fusible material to form ballast resistor components. These components are connected in series with each of the transistors in the integrated circuits. The main advantages are significant area and cost savings in the manufacturing of the integrated circuits as well as an increase in their yield, thereby reducing costly field maintenance and equipment returns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.