Power conducting substrates with high-yield integrated substrate capacitor
US6226171A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 1999 |
| Grant date | May 1, 2001 |
| Priority date | — |
| Expiry date | Jan 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0315
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Several inventive features for increasing the yield of substrate capacitors are disclosed. The inventive features relating to selective placement of insulating layers and patches around selected areas of the capacitor's main dielectric layer. These insulating layers and defects prevent certain manufacturing processing steps from creating pin-hole defects in the main dielectric layer. The inventive features are suitable for any type of material for the main dielectric layer, and are particularly suited to anodized dielectric layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.