Shared memory system for symmetric multiprocessor systems
US6226671A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 1998 |
| Grant date | May 1, 2001 |
| Priority date | — |
| Expiry date | Jul 30, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0284
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shared memory system for symmetric multiprocessing systems including a plurality of physical memory locations in which the locations are either allocated to one node of a plurality of processing nodes, equally distributed among the processing nodes, or unequally distributed among the processing nodes. The memory locations are configured to be accessed by the plurality of processing nodes by mapping all memory locations into a plurality of address partitions within a hierarchy bus. The memory locations are addressed by a plurality of address aliases within the bus while the properties of the address partitions are employed to control transaction access generated in the processing nodes to memory locations allocated locally and globally within the processing nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.