Method for selecting optimal parameters for compiling source code
US6226790A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 1997 |
| Grant date | May 1, 2001 |
| Priority date | — |
| Expiry date | Feb 28, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/4441
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a computer system, a method for determining an optimal loop interchange, set of register tiling amount, and cache tiling size for compiling source code into object code. The method first constructs a model of the specific computer system upon which the object code is to be run. Next, the search space comprising all of the different possibilities of the loop interchanges, register tiling amounts, and cache tiling sizes is run through the model to determine estimated times of execution. The particular loop interchange, set of register tiling amounts, and cache tiling sizes corresponding to the best estimated time of execution is then selected as being the most optimal. The source code is then compiled according to this optimal loop interchange, register tiling amount, and cache tiling size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.