Substrate having trim window in a C5 array
US6229097A · kind A · utility
3Cited by
2References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 8, 1996 |
| Grant date | May 8, 2001 |
| Priority date | — |
| Expiry date | Mar 8, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/16
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A substrate 15 has an electrically adjustable trim pad 50 on the bottom side. A circuit pattern 18 resides on the top side, covered by an RF shield 20. The trim pad is located on the bottom side directly below the RF shield, and is electrically connected 52 to the circuit pattern. A number of surface mount connections 30, typically C5 solder bumps, are located on the bottom side, and surround the trim pad. The trim pad is trimmed after the RF shield is attached, thus providing more accurate tuning of the circuit on the top side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.