High frequency supply compatible hysteresis comparator with low dynamics differential input
US6229346A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2000 |
| Grant date | May 8, 2001 |
| Priority date | — |
| Expiry date | Feb 22, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/3565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A comparator circuit includes a differential input stage, a second differential stage having a differential output, and an output stage transforming an output signal from the differential output of the second differential stage into an output signal having a logic level. The comparator further includes a common mode measuring stage. The common mode measuring stage includes a differential pair of input transistors and a differential pair of complementary transistors biased by respective current generators, and a current mirror summing the differential output currents of the two complementary transistors pairs into a single output current signal. A switching stage is controlled by the differential output nodes of the second differential stage. A common source node of the switch stage is coupled to the output of the common mode measuring stage and to the differential output nodes of the differential input stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.