Semiconductor memory device with function of equalizing voltage of dataline pair
US6229744A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 1999 |
| Grant date | May 8, 2001 |
| Priority date | — |
| Expiry date | Oct 28, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device with a function of equalizing voltages of dataline pair. After turning off the word line and before turning on the equalization means, the datalines are precharged and discharged to a supplied voltage and ground, respectively. Using the theory of uniform distribution of charges, the datalines are equalized into VCC/2, that is, a half of the source supply voltage. The interference on a weak voltage VCC/2 generator within the equalization means during the equalization mode is thus avoided. The equalization of voltages on the dataline pair can be achieved within a transient cycle. Complete data can thus be written or read before the next command is given.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.