Method and apparatus for regulating the amount of buffer memory requested by a port in a multi-port switching device with shared buffer memory
US6230191A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 5, 1998 |
| Grant date | May 8, 2001 |
| Priority date | — |
| Expiry date | Oct 5, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/351
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a switching device such as a network switch having multiple ports and shared buffer memory, method and apparatus for regulating the amount of buffer memory requested by a port. The method includes determining a limit number of buffers that a port may use from the number of available buffers in memory and the number of buffers in memory currently in use by the port. The limit number and number of buffers currently is use are then compared, and the comparison is used to determine whether a buffer request by the port will be generated. In an illustrative embodiment, determining the limit number includes adding the number of available buffers in memory with the number of buffers in memory currently in use by the port to obtain a sum, and multiplying the sum by a port allocation factor. The port allocation factor may be set independently for each port. Apparatus within the switching device practices the method in accordance with the invention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.