Single polysilicon CMOS pixel with extended dynamic range
US6232589A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 1999 |
| Grant date | May 15, 2001 |
| Priority date | — |
| Expiry date | Jan 19, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/80
Abstract
A new method of forming a photogate structure called a "Charge Snare Device" (CSD) uses only a single layer of polysilicon where prior art methods used two or more layers for constructing the gate nodes. Typical CCD structures utilize three layers of polysilicon and CID structures utilize two layers of polysilicon and neither of the prior art structures are suitable for standard sub micron processes. The new CSD device allows biasing of the photogate to the full potential that the process will allow for greater full well for a given pixel size and therefore an improved signal to noise ratio. Charge transfer between the collection site and the sense site isn't controlled as in all previous devices, rather the collection site is completely enclosed by the sense site, effectively snaring all collected photon generated charge as it diffuses and drifts to the sense site. The new photogate structure is suitable for passive pixels, Active Pixel Sensors (APS) or Active Column Sensors (ACS).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.