Method and apparatus for dynamic clock gating
US6232820A · kind A · utility
14Cited by
3References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 14, 1999 |
| Grant date | May 15, 2001 |
| Priority date | — |
| Expiry date | Jun 14, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, an integrated circuit is disclosed that includes a plurality of functional unit blocks (FUBs), wherein each of the plurality of FUBs further includes a clock gated circuit and a clock gating circuit. The clock gating circuit immediately ungates clock signals to be received at the clock gated circuit whenever the clock gated circuit is to transition from an idle state to a non-idle state. According to a further embodiment, the clock gating circuit also immediately gates the clock signals whenever the clock gated circuit is to transition from a non-idle state to the idle state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.