Signal storing circuit semiconductor device, gate array and IC-card
US6233169A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 5, 1999 |
| Grant date | May 15, 2001 |
| Priority date | — |
| Expiry date | Nov 5, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
It is an object to provide signal storing circuits and related devices capable of storing resulting data even when the power supply thereto is suspended, and to provide the signal storing circuit which consumes less power. A logic processing circuit 56 comprises a combined logic block CB and a latching block LT. The latching block LT includes a line 104 for passing the resulting data OUT outputted by the logic block CB. A circular signal path (feedback loop) including a line 106 and another line 108 overlaps a part of the line 104. An inverter circuit INV2 made of a ferroelectric transistor is provided to the line 108. In this way, the resulting data OUT existing on the line 104 can be stored in ferroelectrical manner and the data right before the shut-off of the power supply can be reproduced on the line 104 with the recovery of the power supply. In order to suppress the power consumption, a power control portion 55 switching the power supplied to the latching block LT is provided to the processing circuit 56.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.