Decimation filter for oversampling analog-to digital converter
US6233594A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 1998 |
| Grant date | May 15, 2001 |
| Priority date | — |
| Expiry date | Oct 20, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0664
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The disclosure is generally directed to an improved structure for a decimation filter. More specifically, the disclosure includes a method and apparatus for decimating an oversampled signal at the input, which is the output of an oversampling analog-to-digital converter. In accordance with one aspect of the system, an apparatus is provided for decimating an oversampled signal. The apparatus includes at least one non-recursive decimator. Specifically, the at least one non-recursive decimator is configured to receive the oversampled input signal defined by a first sampling frequency. This at least one non-recursive decimator is further configured to generate a output having a second sampling frequency. The apparatus further includes a recursive decimator. The recursive decimator is configured to receive the output of the at least one non-recursive decimator and generate an output having third sampling frequency. It will be appreciated that the second sampling frequency output from the non-recursive decimator is less than the sampling frequency of the oversampled input signal, and further that the third sampling frequency is less that the second sampling frequency. In accordance with …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.