Method and system for boot-time deconfiguration of a processor in a symmetrical multi-processing system
US6233680A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 1998 |
| Grant date | May 15, 2001 |
| Priority date | — |
| Expiry date | Oct 2, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0793
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for deconfiguring a CPU in a processing system is disclosed. In one aspect, a processing system is disclosed that comprises a central processing unit (CPU), and a memory coupled to the CPU. The error status register for capturing information concerning the status of the CPU. The processing system includes a service processor for gathering and analyzing status information from the CPU error register. The processing system also includes a nonvolatile device coupled to the service processor. The nonvolatile device includes a deconfiguration area. The deconfiguration area stores information concerning the status of the CPU from the service processor. The deconfiguration area also provides information for deconfiguring a CPU during a boot time of the processing system. Accordingly, through the present invention, CPU errors are detected during normal computer operations by error detection logic. This detection is utilized during any subsequent boot process by service processor firmware to deallocate the defective CPU. This is accomplished through the use of error status registers within the CPU and through the use of a deconfiguration area in the nonvolatile device wh…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.