Bonding pad structure
US6236114A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 1999 |
| Grant date | May 22, 2001 |
| Priority date | — |
| Expiry date | May 6, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bonding pad is described. A substrate having integrated circuits formed therein is provided. A dielectric layer having several trench structure formed therein is formed over the substrate, and each trench structure has several trenches radially arranged in the dielectric layer. A conductive layer is formed on the dielectric layer and fills the trenches, and the conductive layer is electrically coupled to the integrated circuits in the substrate through the trenches, respectively. By using the invention, the adhesion of the dielectric layers and the metal layers can be greatly improved and the compressive mechanical stress can be uniformly released to the substrate even if the wire width of the integrated circuit is reduced to the sub-micron level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.