Flash memory device including circuitry for selecting a memory block
US6236594A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 26, 2000 |
| Grant date | May 22, 2001 |
| Priority date | — |
| Expiry date | Apr 26, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor memory device has a memory block including a string having a string select transistor responsive to a string select line, a ground select transistor responsive to a ground select line, and a plurality of EEPROM cells responsive to a corresponding plurality of word lines, the plurality of EEPROM cells being serially connected between the string select transistor and the ground select transistor. A first block select transistor is coupled to the ground select transistor. A second block select transistor is coupled to the string select transistor. A plurality of third block select transistors is coupled to the plurality of word lines. A voltage control means provides a first voltage to the first block select transistor and a second voltage to the third block select transistors, the first voltage being less than the second voltage during programming. According to the present invention, a voltage difference occurring between the gate and the drain of the first block select transistor is reduced. The result is a significant stress reduction on the first block select transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.