Decision directed phase locked loop (DD-PLL) for use with short block codes in digital communication systems
US6236687A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1999 |
| Grant date | May 22, 2001 |
| Priority date | — |
| Expiry date | Feb 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0089
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An improved digital decision directed phase locked loop (DD-PLL) for use with short block codes using phase shifting keying (PSK) modulation. The improvement involves a conventional digital phase lock loop which is modified to base its loop corrections on the results obtained by decoding the short block code rather than on a symbol by symbol basis as is customary in conventional DD-PLLs. The improved method of loop corrections involves retaining the symbol data pending the decoder's decision, derotating the retained data in accordance with the decoded result, and integrating the derotated data to form a composite estimator upon which to base the loop correction. In its preferred embodiment, the invention uses an (8, 4) biorthogonal code with quatenary PSK.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.