Method and apparatus for adaptable digital protocol processing
US6237029A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1996 |
| Grant date | May 22, 2001 |
| Priority date | — |
| Expiry date | Feb 26, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5672
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Processor methods and apparatus for adaptable network processing having speed advantages often associated with hardware implementations of network processing code or logic, as is often achieved using ASICs, for example, but at the same time having reconfigurability advantages often associated with software implementations of this code or logic. Methods and apparatus are described for adaptable hardware devices, such as a field programmable gate array (FPGA) or a circuit using FPGAs, to execute network processing code or logic. Methods and apparatus are described for using a software based device to program adaptable hardware devices to implement desired network processing code or logic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.