Method and system for making internal states of an integrated circuit visible during normal operation without the use of dedicated I/O pins
US6237119A · kind A · utility
1Cited by
2References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 3, 1999 |
| Grant date | May 22, 2001 |
| Priority date | — |
| Expiry date | Feb 3, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318572
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system includes a first integrated circuit and a second integrated circuit coupled by at least one signal line. The first integrated circuit outputs on the signal line an interleaved output signal including both operating data and debug data. The second integrated circuit receives as an input signal, of the operating data and the debug data, only the operating data. In this manner, the internal states of the first integrated circuit are made visible during normal operation of the system without the use of dedicated I/O pins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.