Bit clearing mechanism for an empty list
US6240065A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 1998 |
| Grant date | May 29, 2001 |
| Priority date | — |
| Expiry date | Jul 30, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/501
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for managing packet memory is provided. The apparatus includes an empty list, a storage buffer and apparatus for updating the storage buffer and empty list. The empty list includes a multiplicity of single bit buffers. The storage buffer includes a multiplicity of contiguous buffers, wherein each single bit buffer is associated with one of the contiguous buffers. The state of the bit of a single bit buffer indicates the empty or full state of the associated contiguous buffer and the address of a contiguous buffer is a simple function of the address or number of its associated single bit buffer. The updating apparatus stores data in and removes data from the contiguous buffers and correspondingly updates the states of the associated single bits buffers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.