Method for producing vias in the manufacture of printed circuit boards
US6240636A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 1999 |
| Grant date | Jun 5, 2001 |
| Priority date | — |
| Expiry date | Mar 30, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a process producing a multi-layer printed wiring board, an inner core having at least one wiring pattern on its surface and an outer layer of copper foil are laminated with an organic insulating layer interposed therebetween, a via hole is formed using a laser beam, and the outer copper foil and the inner wiring patterns are electrically connected to each other by depositing copper. The process is characterized in that the outer layer of copper foil has a thickness of no more than one-fifth of the thickness of the inner wiring pattern, but will not exceed 7 .mu.m, preferably 4 .mu.m. The hole is formed in both the copper foil and the insulating layer simultaneously by irradiating with a laser beam on the outer layer of copper foil.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.