Nonvolatile semiconductor memory device
US6243290A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Aug 25, 2000 |
| Grant date | Jun 5, 2001 |
| Priority date | — |
| Expiry date | Aug 25, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a nonvolatile semiconductor memory device for multilevel data storage that simultaneously carries out programming of multilevel data and subsequent verification at a high programming throughput. For this purpose, the present device includes a circuit 6 to hold programming data when programming is executed, a circuit 7 to generate timing signals to set up level-specific phases of verifying multilevel programming data during a verification period, a circuit 2 to increase stepwise the selected word line voltage during verification in accordance with the above timing signals, a circuit 4 to select target memory cells 1 for verification, depending on the data retrieved from the latch in accordance with the above timing signals, and verify whether the selected memory cells have been programmed on threshold voltage level, according to the energized or de-energized state thereof, and a circuit 5 to supply programming bias to the bit line to program data into insufficiently programmed memory cells, according to the verify results.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.