Semiconductor memory device, nonvolatile semiconductor memory device, and their data reading method
US6243313A · kind A · utility
14Cited by
7References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2000 |
| Grant date | Jun 5, 2001 |
| Priority date | — |
| Expiry date | Jul 18, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In order to eliminate erroneous reading of data by preventing noise which might otherwise be transmitted at the data read time through parasitic capacitance in the data lines to other data lines, switches (Qt1 and Qt1') are interposed between a sense amplifier (SA) for amplifying the potential of a data line (DL) and the data line, and the sense amplifier is fed with an operating voltage after the potential of the data line is transmitted to the sense amplifier, and the switch is turned off.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.