Monitoring and control apparatus incorporating run-time fault detection by boundary scan logic testing
US6243665A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 1997 |
| Grant date | Jun 5, 2001 |
| Priority date | — |
| Expiry date | Aug 22, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/327
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The monitoring control apparatus according to the present invention performs a test on each integrated circuit that supports the boundary scan test method loaded on CPU board 4 and control board 5, and on the connection relationships of these integrated circuits, by a boundary scan controller board 7 like that shown, for example, in FIG. 1. If an abnormality is detected in CPU board 4 or control board 5, an alarm apparatus 9 is activated which emits an alarm. Moreover, if the type of abnormality is such that there is the risk of it having a significant effect on the operation of a robot 3, which is the target of this monitoring and control, from the viewpoint of safety, main power supply apparatus 6 of robot 3 is interrupted to prevent in advance robot 3 from running out of control.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.