Instruction set interpreter which uses a register stack to efficiently map an application register state
US6243668A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 7, 1998 |
| Grant date | Jun 5, 2001 |
| Priority date | — |
| Expiry date | Aug 7, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30134
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of executing a program compiled for a base instruction set architecture different than a native instruction set architecture, on a native machine by organizing a runtime system module into at least a low level domain, a medium level domain, and a high level domain. A memory buffer referred to as a backing store is created to correspond to a register stack and have a one-to-one mapping with the register stack. The invention initializes a beginning of the backing store to contain user-visible register values which constitute base instruction set architecture register values, and sets a virtual instruction pointer to a current instruction which is to be executed. The method of the present invention executes a start routine for forcing a reload of the user-visible register values from the backing store to the register stack and returns to the low level domain to perform a lookup operation in a translation lookaside buffer. The present invention also calls the medium level domain from the low level domain to perform a lookup operation in an address map if the lookup operation in the translation lookaside buffer fails. It further calls the medium level domain if a translated blo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.