Microcomputer with the capability of suppressing signals which reset a watchdog-timer

US6243837A · kind A · utility

Assignee

• Robert Bosch GmbH · DE

Inventors

• Jurgen Zimmermann · Salzgitter, DE
• Walter Grote · Markgröningen, DE

Key dates

• Filing date: Mar 3, 1995
• Grant date: Jun 5, 2001
• Expiry date: Mar 3, 2015

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F11/0757
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A microcomputer (10) is proposed, which includes a central processing unit (11), a non-volatile memory (13), a volatile memory (14), a monitoring circuit (12) and also an input/output unit (16). Two different operating states are possible in the microcomputer (10). In the first operating state, the microcomputer executes a program which is located in the non-volatile memory (13). In the second operating state, the microcomputer (10) executes a program which is located in the volatile memory (14). The monitoring circuit (12) effects a resetting of the microcomputer (10) whenever it does not receive a monitoring signal for a predetermined time (watchdog timer). The microcomputer is distinguished in that it includes an element for suppressing monitoring signals which are always active whenever the microcomputer (10) is operating in the second operating state.