Compiler for optimizing memory instruction sequences by marking instructions not having multiple memory address paths
US6243864A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 1998 |
| Grant date | Jun 5, 2001 |
| Priority date | — |
| Expiry date | Jul 15, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/443
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Internal variables generated by a compiler are assigned to machine resources such as registers and memory by the resource assigning unit 11, and when the assembler code generation unit 18 has outputted an instruction sequence, the alias accessibility analyzing unit 19 registers memory access instructions in the instruction sequence in the assigned resource information 14 according to whether the instructions have a possibility of access by alias. The assembler code optimization unit 20 refers to the assigned resource information 14 and performs optimization at assembler level, thereby reducing the program size and execution time of the instruction sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.