Phase lock loop circuit with automatic selection of oscillation circuit characteristics
US6246292A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 13, 1999 |
| Grant date | Jun 12, 2001 |
| Priority date | — |
| Expiry date | Dec 13, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/46
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A phase lock loop (PLL) circuit has an oscillation circuit operating in synchronism with a horizontal synchronizing signal. The PLL circuit also has a DC level decision circuit for deciding the DC level of a vertical synchronizing signal during a return period, and a logic circuit for automatically selecting the oscillation circuit according to the DC level decided in the DC level decision unit. Thus, even if there is an increase in the oscillation characteristics, this PLL circuit can automatically select the necessary oscillation characteristics without a need for expanding an operation frequency of a voltage controlled oscillation circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.