Storage system employing high-rate code with constraint on run length between occurrences of an influential pattern
US6246346A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 1997 |
| Grant date | Jun 12, 2001 |
| Priority date | — |
| Expiry date | Oct 24, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/46
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A storage system employs a method for encoding a sequence of input data blocks into a sequence of codewords. Each input data block includes a first predetermined number of bits (the data block length). Each codeword includes a second predetermined number of bits (the codeword length). The code rate, i.e., the ratio of the first number to the second number, is greater than 3/4. The method is performed in a sampled-data channel in a storage system; and the channel includes a circuit the performance of which is adversely affected by an excessive run length of bits between occurrences of a predetermined influential pattern. Preferably, the influential pattern is a two-bit sequence of adjacent 1's, which favorably influences the performance of a timing recovery circuit. The method includes receiving the sequence of input data blocks and generating the sequence of codewords responsive to the received sequence of input data blocks. The sequence of codewords has a constraint on the maximum run length of bits between occurrences of the influential pattern, the maximum run length of bits being less than or equal to the codeword length.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.