Low jitter digital extraction of data from serial bitstreams
US6249555A · kind A · utility
5Cited by
19References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 14, 1997 |
| Grant date | Jun 19, 2001 |
| Priority date | — |
| Expiry date | Jul 14, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/041
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A low jitter method for extracting clock or data from a serial digital bitstream generates from a digital decoder a window signal from the serial digital bitstream by sampling the serial digital bitstream with a sample clock signal. The window signal envelops a specified transition of the serial digital bitstream, and is used as a gate input to an AND circuit to extract the clock signal or desired data from the bitstream without introducing jitter. The clock signal may then be used to clock out data previously extracted by the digital decoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.