Apparatus using a multiple instruction register logarithm based processor
US6249857A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 1997 |
| Grant date | Jun 19, 2001 |
| Priority date | — |
| Expiry date | Oct 20, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3891
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In accordance with a first embodiment, a processing apparatus is provided. The processing apparatus (10) includes a register (12) including a first and a second programming instruction, a first processing unit (16) responsive to the first programming instruction, and a second processing unit (22) responsive to the second programming instruction. The second processing unit (22) includes a logarithm based processor having at least one digital logarithm converter (80), a digital logic device (82), and a digital inverse logarithm converter (84). In other embodiments, the processing apparatus (10) is incorporated into a communication device (100) and a video system (300).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.