Memory characterization system
US6249901A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 2000 |
| Grant date | Jun 19, 2001 |
| Priority date | — |
| Expiry date | May 4, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An automatic memory characterization system for determining timing characteristics associated with each of a plurality of circuit instances of a memory compiler circuit design includes: an automatic circuit reduction tool for receiving a circuit netlist extracted from layout data defining a circuit instance of the memory compiler, and for generating a critical path netlist; a memory storage unit for storing a timing parameter database including a script file having memory characterization instructions, and at least one specification file associated with one of the timing characteristics to be characterized for the circuit instance, the specification file having a plurality of input signal parameters defining a plurality of input signals to be applied to selected input nodes of the circuit instance, and a plurality of output loading parameters defining a plurality of output loads to be applied to selected output nodes of the circuit instance; a stimulus generator responsive to the input signal parameters and operative to generate a stimulus file; and a circuit simulation manager operative to access the timing parameter database, and to execute at least a portion of the memory charac…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.