Digital integrator
US6252232A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 1998 |
| Grant date | Jun 26, 2001 |
| Priority date | — |
| Expiry date | Jun 29, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01T1/17
- WIPO fieldEnvironmental technology
- WIPO sectorChemistry
Abstract
A detector including opposed detector heads having anode signal processors which perform a sliding box car integration of each PMT anode signal, corrects for baseline shifts and pileup from the tails of previous events, vary the length of the box car based on the time between events, and use a peak detection circuit to reduce the dependence of the integrated value on timing differences between the asynchronous events and the synchronous ADC conversion is described. The outputs of anode processors are combined to provide the X and Y coordinates, and the energy E, of an event. The outputs from each head processor are then combined in a coincidence processor to provide the corrected positions and energies of coincidence events. The above described detector heads function at a high count rate with minimum dead time and pileup.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.