DMOS transistor having a high reliability and a method for fabricating the same
US6252279A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 17, 1999 |
| Grant date | Jun 26, 2001 |
| Priority date | — |
| Expiry date | Aug 17, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/257
Abstract
A power DMOS transistor having an improved current driving capability and improved reliability is provided. A fabrication method thereof is also provided. The DMOS transistor includes a semiconductor substrate having a first conductivity type and a semiconductor region having a second conductivity type formed on the semiconductor substrate. A drain having a second conductivity type is formed on the semiconductor region. A high-concentration buried impurity layer having a second conductivity type is formed on the semiconductor region under the drain. A body region having a first conductivity type is formed in the semiconductor substrate spaced a predetermined distance from the semiconductor region. A source having a second conductivity type is formed on the body region. A gate electrode is formed on the semiconductor substrate having a gate insulative film formed thereon. A source electrode and a drain electrode coupled respectively to the source and the drain are formed on the resultant structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.