FET balun transformer
US6252460A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 11, 2000 |
| Grant date | Jun 26, 2001 |
| Priority date | — |
| Expiry date | Jan 11, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45706
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An inventive FET balun transformer uses a positive power supply alone, not a negative one, thus downsizing a device including the balun transformer. In the FET balun transformer, a voltage supplied from the positive power supply is divided by a voltage divider consisting of a pair of resistors. The gate of a first FET is biased at a positive voltage, which is obtained by getting the divided supply voltage further divided by a first resistor. The gate of a second FET is grounded with an AC grounded capacitor interposed therebetween and biased at a positive voltage, which is obtained by getting the divided supply voltage further divided by a second resistor. Thus, the gate and source of a third FET do not have to be set at a negative potential, but may be grounded directly and via a biasing resistor, respectively. As a result, no negative power supply is needed for the third FET and the single-ended signal received at the input terminal can be converted into differential signals, which will be output through output terminals, while using the positive power supply alone.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.