Method for underfilling semiconductor devices
US6255142A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 1999 |
| Grant date | Jul 3, 2001 |
| Priority date | — |
| Expiry date | Oct 29, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for underfilling a gap between a multi-sided semiconductor device and a substrate with viscous underfill material. The viscous underfill material is moved into the gap to encapsulate a plurality of electrical interconnections formed between the semiconductor device and the substrate. A seal is provided between the semiconductor device and the substrate to seal the gap along multiple sides of the device, while the gap is left unsealed along at least one side of the device to permit fluid communication with the gap. The viscous underfill material is dispensed adjacent the at least one side of the device along which the gap is unsealed, and a pressure differential is created across the underfill material to draw the underfill material into the gap and thereby encapsulate the electrical interconnections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.