Address selection circuitry and method using single analog input line
US6255973A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 1999 |
| Grant date | Jul 3, 2001 |
| Priority date | — |
| Expiry date | Aug 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/66
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system for a providing addresses to each one of a plurality of addressable integrated circuits. The system includes a plurality of address select circuits, each one thereof being coupled to a corresponding one of a corresponding plurality of addressable integrated circuit. Each one of such integrated circuits has an address select pin adapted to receive a signal from the corresponding one of the address select circuits. The signal is indicative of an address for such one of the plurality of addressable integrated circuits. Each one of such address circuit includes a signal source connected to the pin and a circuit for coding such signal source into a selected one of more than three predetermined signal levels. The integrated circuit includes a converter for converting such selected one of the signal levels into a address signal for such one of the integrated circuits during an initial address select mode and for providing conversion of a second signal in the integrated circuit for use by such integrated circuit in processing the second signal fed to such integrated circuit during a subsequent normal operating mode. In one embodiment the converter is an analog to digital converter…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.