CMOS flash analog to digital converter compensation
US6255979A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 1999 |
| Grant date | Jul 3, 2001 |
| Priority date | — |
| Expiry date | Feb 24, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/362
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter (ADC) is provided. The analog-to-digital converter includes a plurality of differential comparators. For each of the plurality of differential comparators the ADC receives differential input signals and differential reference signals and generates an output signal. The ADC also includes a self-calibration circuit to receive from each of the plurality of differential comparators the output signal. In response to the output signal, the self-calibration circuit generates a self-calibration signal. The ADC further includes an adjustable reference signal generator to provide the differential reference signals based on the self-calibration signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.