Processor for two-dimensional array antenna
US6255990A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 11, 1999 |
| Grant date | Jul 3, 2001 |
| Priority date | — |
| Expiry date | May 11, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01Q21/061
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Signal processors that support transmit or receive beams of two dimensional array antennas generate an appropriate distribution of phase shifts and/or time delays for each of the elements in the antenna array. The signals are processed by row and by column, where corresponding elements are grouped using intermediate frequency tagging, i.e., the elements of a first column are translated to a first intermediate frequency, the elements of a second column are translated to a second intermediate frequency, etc. Signals from elements of like rows are then summed and subjected to a row delay. The delayed signals are then summed and passed through a filter bank, where the summed signal is partitioned in accordance with the plurality of intermediate frequencies into a plurality of column signals. The column signals are subjected to a respective column delays, are translated to a common intermediate or baseband frequency and are summed to establish a received beam signal. The concept is applicable to multiple beam arrays and transmission arrays as well. By processing the signals by row and column, the number of phase shift elements is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.