Transmission apparatus for half duplex communication using HDLC
US6256325A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 3, 1998 |
| Grant date | Jul 3, 2001 |
| Priority date | — |
| Expiry date | Jun 3, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/041
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A transmission apparatus for half duplex communication using HDLC is provided, in which a simple logic circuit is added to a general HDLC controller to transmit a frame, adding flags before and after the frame all the time, without modification of program even when a transmission speed is changed, thereby enabling rapid and reliable communications. The transmission apparatus for half duplex communication using HDLC includes: a clock (TxC) generator, to supply it to each section of the apparatus as a synchronous clock; an HDLC controller for outputting a flag signal in a predetermined bit pattern while it does not transmit a frame signal; flag delay/detecter for outputting with delaying an output (TxD) of the HDLC controller by one byte, and outputting a flag detection signal (/Flag_detect) whenever the flag signal is detected; a CPU for outputting a transmission request signal (/Tx_Req) during a period determined with relation to the magnitude of the frame signal when data transmission is required, and sending the frame signal to the HDLC controller after a transmission ready signal (/Tx_Ready) is received; control logic for synchronizing the transmission request signal (/Tx_Req) w…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.