Method of fabricating a semiconductor device having insulating tape interposed between chip and chip support
US6258621A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 1999 |
| Grant date | Jul 10, 2001 |
| Priority date | — |
| Expiry date | Feb 1, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a plastic packaged semiconductor device, a chip support formed on the same lead frame as leads is disposed so as to extend over the surface of a semiconductor element, the chip support is bonded and fixed to the surface of a polyimide wafer coat on the semiconductor element by means of an insulating tape, the leads are brought into contact with the polyimide wafer coat on the semiconductor element without being fixed, the leads and the electrodes of the semiconductor element are connected by means of gold wires, and these are packaged by a packaging material. Generation of crack in the sealing material thereby prevented, and the thickness of the plastic packaged semiconductor device is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.