Pseudo dual-port DRAM for simultaneous read/write access
US6259634A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2000 |
| Grant date | Jul 10, 2001 |
| Priority date | — |
| Expiry date | May 22, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1075
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and/or method for simultaneous read/write access of 1-Transistor (1-T) dynamic random access memory (DRAM), which does not rely on a dual-port DRAM to perform read and write accesses within single clock cycle. A single-port 1-T DRAM works with modified design of read sense amplifier to perform both read and write accesses within single clock cycle, thereby retaining high performance and compact size that characterize the 1-T DRAM while allowing simultaneous read/write access that characterizes dual-port memory. Hence, single-port 1-T DRAM constitutes a pseudo dual-port 1-T DRAM that emulates the dual-port DRAM's ability in performing simultaneous read/write memory access of 1-T DRAM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.