Input buffer controller using back-pressure signals in ATM switches and a method for determining the logical queue size
US6259698A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 1998 |
| Grant date | Jul 10, 2001 |
| Priority date | — |
| Expiry date | Jun 11, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5682
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A controller for the logical buffer depth in ATM switching system and a method for determining the logical queue depth, using the back-pressure signal and the occupied buffer depth information and supporting the P classes, are disclosed. The controller includes Routing Table Element making tag for routing of input cell; Input Buffer storing the cell that a tag is attached to in said routing table element; Switch fabric that reads the cell from said input buffer and then switches it to the output port; and Input buffer controller controlling the logical queue size in said input buffer. And the method for determining the logical queue depth includes the steps of calculating the back-pressure signal occurrence rate b.sub.i of the ith class; calculating the back-pressure signal occurrence threshold rate b.sub.i.sub..sub.-- .sub.th of the ith class; calculating the buffer depth T.sub.i of the logical queue of the ith class; calculating threshold values T.sub.iH, T.sub.iL of the two buffer depths of the ith class; calculating the buffer size L.sub.i of the logical queue of the ith class; calculating the empty area size D.sub.j (j=1, 2, 3, L, P) of logical queues for the number of p class…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.